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Data Access Performance Optimization on the Intel® 80321 I/O Processor
This paper focuses on data access performance optimization for the Intel®
80321 I/O processor based on Intel® XScale™ microarchitecture
(80321) (ARM* architecture compliant). The intent is to optimize access to
data structures in SDRAM, reducing total processing time and internal bus
utilization. The optimizations discussed are based on optimizing the
usage of the Intel® XScale™ core and the 80321 peripherals. Instruction-set
based optimizations are outside the scope of this document.
Intel is a trademark or registered trademark of Intel Corporation or its subsidiaries in the United States and other countries. ARM and StrongARM are registered trademarks of ARM, Ltd. Other names and brands may be claimed as the property of others.
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