AP-731 Understanding the ICU of the 80C186EC/80C APPENDIX A
APPENDIX A
Example A-1. Initialization Sequence and ISR Examples (Sheet 1 of 8)
Software Examples
A.1 Initialization Sequence and ISR Examples
This software example illustrates interrupt vector initialization, basic interrupt controller initialization sequence and
simple interrupt service routines. This software was assembled using Intel ASM86 and was tested using the Intel
EV80C186EC evaluation board REV 1.1.
$ TITLE (82C59 Programming Example)
$ MOD186
NAME ICU_DEMO
$INCLUDE (C:\EV186EC\ECPCB.INC)
;INCLUDE PERIPHERAL CONTROL BLOCK REGISTER MAP
_7SEG1 EQU 1000H ;7 SEGMENT #1 I/O ADDRESS
_7SEG2 EQU 1010H ;7 SEGMENT #2 I/O ADDRESS
ZERO EQU 03FH ;BIT MAPS FOR 7 SEG DISPLAY
ONE EQU 06H
TWO EQU 05BH
THREE EQU 04FH
FOUR EQU 066H
FIVE EQU 06DH
SIX EQU 07CH
SEVEN EQU 07H
PATTERN1 EQU 064H ;IDENTIFIES SPURIOUS INTERRUPT ON MASTER
PATTERN2 EQU 052H ;IDENTIFIES SPURIOUS INTERRUPT ON SLAVE
MASTER_BASE_TYPE EQU 96 ;TYPE*4 = BASE ADDR OF MASTER
SLAVE_BASE_TYPE EQU 104 ;TYPE*4 = BASE ADDR OF SLAVE
;SEE FIGURE 8-1 OF THE 80C186EC/80C188EC USER'S MANUAL
INT0_TYPE EQU MASTER_BASE_TYPE
INT1_TYPE EQU MASTER_BASE_TYPE + 1
INT2_TYPE EQU MASTER_BASE_TYPE + 2
INT3_TYPE EQU MASTER_BASE_TYPE + 3
INT4_TYPE EQU MASTER_BASE_TYPE + 4
INT5_TYPE EQU MASTER_BASE_TYPE + 5
INT6_TYPE EQU MASTER_BASE_TYPE + 6
INT7_TYPE EQU SLAVE_BASE_TYPE + 7
SPM_TYPE EQU MASTER_BASE_TYPE + 7
;+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
;CODE SEGMENT AT LOCATION 1000H WHICH IS IN THE SRAM OF THE EV80C186EC EVALUATION
;BOARD
;+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
EC_CODE SEGMENT AT 0100H ;PUT CODE IN SRAM OF EVALBOARD
ASSUME CS:EC_CODE
MAIN: CLI ;DISABLE INTERRUPTS
CALL CLR_LEDS ;CLEAR 7SEG DISPLAYS
CALL SETVECT ;INITIALIZE INTERRUPT VECTORS
CALL INIT_ICU ;INITIALIZE INTERRUPT CONTROL UNIT
STI ;ENABLE INTERRUPTS
JMP $ ;WAIT FOR INTERRUPTS
;+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
;PROCEDURE: SETVECT
;
;THIS PROCEDURE INITIALIZES THE INTERRUPT VECTOR TABLE FOR EXTERNAL
;INTERRUPTS INT0-7 AND ALSO INTITIALIZES THE INTERRUPT VECTORS FOR SPURIOUS
;INTERRUPT DETECTION
;+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
SETVECT PROC
XOR AX, AX ;CLEAR ACCUMULATOR
MOV DS, AX ;CLEAR DATA SEGMENT
;SETUP INT0 INTERRUPT VECTOR
MOV DI, INT0_TYPE*4 ;MOVE BASE ADDRESS OF INT0 VECTOR IN TO DI
MOV WORD PTR DS:[DI], OFFSET INT0_ISR
MOV WORD PTR DS:[DI+2], SEG INT0_ISR
;SETUP INT1 INTERRUPT VECTOR
MOV DI, INT1_TYPE*4 ;MOVE BASE ADDRESS OF INT1 VECTOR IN TO DI
MOV WORD PTR DS:[DI], OFFSET INT1_ISR
MOV WORD PTR DS:[DI+2], SEG INT1_ISR
;SETUP INT2 INTERRUPT VECTOR
MOV DI, INT2_TYPE*4 ;MOVE BASE ADDRESS OF INT2 VECTOR IN TO DI
MOV WORD PTR DS:[DI], OFFSET INT2_ISR
MOV WORD PTR DS:[DI+2], SEG INT2_ISR
;SETUP INT3 INTERRUPT VECTOR
MOV DI, INT3_TYPE*4 ;MOVE BASE ADDRESS OF INT3 VECTOR IN TO DI
MOV WORD PTR DS:[DI], OFFSET INT3_ISR
MOV WORD PTR DS:[DI+2], SEG INT3_ISR
;SETUP INT4 INTERRUPT VECTOR
MOV DI, INT4_TYPE*4 ;MOVE BASE ADDRESS OF INT4 VECTOR IN TO DI
MOV WORD PTR DS:[DI], OFFSET INT4_ISR
MOV WORD PTR DS:[DI+2], SEG INT4_ISR
;SETUP INT5 INTERRUPT VECTOR
MOV DI, INT5_TYPE*4 ;MOVE BASE ADDRESS OF INT5 VECTOR IN TO DI
MOV WORD PTR DS:[DI], OFFSET INT5_ISR
MOV WORD PTR DS:[DI+2], SEG INT5_ISR
;SETUP INT6 INTERRUPT VECTOR
MOV DI, INT6_TYPE*4 ;MOVE BASE ADDRESS OF INT6 VECTOR IN TO DI
MOV WORD PTR DS:[DI], OFFSET INT6_ISR
MOV WORD PTR DS:[DI+2], SEG INT6_ISR
;SETUP INT7 INTERRUPT VECTOR (ALSO THE INTERRUPT VECTOR FOR SPURIOUS
;INTERRUPT DETECTION FOR THE SLAVE)
MOV DI, INT7_TYPE*4 ;MOVE BASE ADDRESS OF INT7 VECTOR IN TO DI
MOV WORD PTR DS:[DI], OFFSET INT7_ISR
MOV WORD PTR DS:[DI+2], SEG INT7_ISR
;SETUP SPURIOUS INTERRUPT VECTOR FOR MASTER
MOV DI, SPM_TYPE*4 ;MOVE BASE ADDRESS OF IR7 OF MASTER VECTOR TO DI
MOV WORD PTR DS:[DI], OFFSET SPM_ISR
MOV WORD PTR DS:[DI+2], SEG SPM_ISR
RET
SETVECT ENDP
;+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
;INTERRUPT SERVICE ROUTINE: INT0_ISR
;
;THIS PROCEDURE WILL DISPLAY A `O' ON THE 7 SEGMENT DISPLAY IF INT0 WAS ASSERTED
;+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
INT0_ISR PROC
MOV DX, _7SEG1 ;DISPLAY `O' ON 7 SEGMENT DISPLAY
MOV AL, ZERO
OUT DX, AL
MOV DX, MPICP0 ;CLEAR IN-SERVICE BIT BY ISSUING EOI
MOV AL, 20H
OUT DX, AL
IRET
INT0_ISR ENDP
;+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
;INTERRUPT SERVICE ROUTINE: INT1_ISR
;
;THIS PROCEDURE WILL DISPLAY A `1' ON THE 7 SEGMENT DISPLAY IF INT1 WAS ASSERTED
;+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
INT1_ISR PROC
MOV DX, _7SEG1 ;DISPLAY `1' ON 7 SEGMENT DISPLAY
MOV AL, ONE
OUT DX, AL
MOV DX, MPICP0 ;CLEAR IN-SERVICE BIT BY ISSUING EOI
MOV AL, 20H
OUT DX, AL
IRET
INT1_ISR ENDP
;+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
;INTERRUPT SERVICE ROUTINE: INT2_ISR
;
;THIS PROCEDURE WILL DISPLAY A `2' ON THE 7 SEGMENT DISPLAY IF INT2 WAS ASSERTED
;+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
INT2_ISR PROC
MOV DX, _7SEG1 ;DISPLAY `2' ON 7 SEGMENT DISPLAY
MOV AL, TWO
OUT DX, AL
MOV DX, MPICP0 ;CLEAR IN-SERVICE BIT BY ISSUING EOI
MOV AL, 20H
OUT DX, AL
IRET
INT2_ISR ENDP
;+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
;INTERRUPT SERVICE ROUTINE: INT3_ISR
;
;THIS PROCEDURE WILL DISPLAY A `3' ON THE 7 SEGMENT DISPLAY IF INT3 WAS ASSERTED
;+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
INT3_ISR PROC
MOV DX, _7SEG1 ;DISPLAY `3' ON 7 SEGMENT DISPLAY
MOV AL, THREE
OUT DX, AL
MOV DX, MPICP0 ;CLEAR IN-SERVICE BIT BY ISSUING EOI
MOV AL, 20H
OUT DX, AL
IRET
INT3_ISR ENDP
;+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
;INTERRUPT SERVICE ROUTINE: INT4_ISR
;
;THIS PROCEDURE WILL DISPLAY A `4' ON THE 7 SEGMENT DISPLAY IF INT4 WAS ASSERTED
;+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
INT4_ISR PROC
MOV DX, _7SEG1 ;DISPLAY `4' ON 7 SEGMENT DISPLAY
MOV AL, FOUR
OUT DX, AL
MOV DX, MPICP0 ;CLEAR IN-SERVICE BIT BY ISSUING EOI
MOV AL, 20H
OUT DX, AL
IRET
INT4_ISR ENDP
;+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
;INTERRUPT SERVICE ROUTINE: INT5_ISR
;
;THIS PROCEDURE WILL DISPLAY A `5' ON THE 7 SEGMENT DISPLAY IF INT5 WAS ASSERTED
;+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
INT5_ISR PROC
MOV DX, _7SEG1 ;DISPLAY `5' ON 7 SEGMENT DISPLAY
MOV AL, FIVE
OUT DX, AL
MOV DX, MPICP0 ;CLEAR IN-SERVICE BIT BY ISSUING EOI
MOV AL, 20H
OUT DX, AL
IRET
INT5_ISR ENDP
;+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
;INTERRUPT SERVICE ROUTINE: INT6_ISR
;
;THIS PROCEDURE WILL DISPLAY A `6' ON THE 7 SEGMENT DISPLAY IF INT6 WAS ASSERTED
;+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
INT6_ISR PROC
MOV DX, _7SEG1 ;DISPLAY `6' ON 7 SEGMENT DISPLAY
MOV AL, SIX
OUT DX, AL
MOV DX, MPICP0 ;CLEAR IN-SERVICE BIT BY ISSUING EOI
MOV AL, 20H
OUT DX, AL
IRET
INT6_ISR ENDP
;+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
;INTERRUPT SERVICE ROUTINE: INT7_ISR
;
;THIS PROCEDURE WILL DISPLAY A `7' ON THE 7 SEGMENT DISPLAY IF INT7 WAS ASSERTED
;OR WILL DISPLAY PATTERN2 IF A SPURIOUS INTERRUPT WAS DETECTED ON THE SLAVE
;+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
INT7_ISR PROC
MOV DX, SPICP0 ;PREPARE TO READ IN-SERVICE REGISTER
MOV AL, 0BH
OUT DX, AL
IN AL, DX ;READ FROM IN-SERVICE REGISTER TO DETERMINE
;IF VALID INTERRUPT OR SPURIOUS INTERRUPT
CMP AL, 80H ;CHECK TO SEE IF SPURIOUS OR NOT (10000000)=IR7
JZ IR7 ;JUMP IF INTERRUPT WAS IR7 ASSERTION
MOV DX, _7SEG1 ;DISPLAY PATTERN2 ON 7 SEGMENT DISPLAY
MOV AL, PATTERN2 ;TO ILLUSTRATE SPURIOUS INTERRUPT HAS
OUT DX, AL ;OCCURED ON SLAVE
JMP DONE
IR7: MOV DX, _7SEG1 ;DISPLAY `7' ON 7 SEGMENT DISPLAY
MOV AL, SEVEN
OUT DX, AL
MOV DX, SPICP0 ;CLEAR IN-SERVICE BIT OF SLAVE BY ISSUING EOI
MOV AL, 20H
OUT DX, AL
DONE: MOV DX, MPICP0 ;CLEAR IN-SERVICE BIT OF MASTER BY ISSUING EOI
MOV AL, 20H
OUT DX, AL
IRET
INT7_ISR ENDP
;+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
;INTERRUPT SERVICE ROUTINE: SPM_ISR
;
;THIS PROCEDURE WILL DISPLAY PATTERN1 ON THE 7 SEGMENT DISPLAY IF SPURIOUS
;INTERRUPT WAS DETECTED ON THE MASTER
;+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
SPM_ISR PROC
MOV DX, _7SEG1 ;DISPLAY PATTERN1 ON 7 SEGMENT DISPLAY
MOV AL, PATTERN1 ;TO ILLUSTRATE SPURIOUS INTERRUPT HAS
OUT DX, AL ;OCCURRED ON MASTER PIC
IRET
SPM_ISR ENDP
;+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
;PROCEDURE: CLR_LEDS
;THIS PROCEDURE SIMPLY TURNS OFF ALL OF THE SEGMENTS THE 7 SEGMENT DISPLAY
;+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
CLR_LEDS PROC
MOV DX, _7SEG1
XOR AL, AL
OUT DX, AL
MOV DX, _7SEG2
OUT DX, AL
RET
CLR_LEDS ENDP
;+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
;PROCEDURE: INIT_ICU
;THIS PROCEDURE INITIALIZES THE INTERNAL MASTER AND SLAVE 82C59 OF THE
;80C186EC PROCESSOR
;+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
INIT_ICU PROC
;ALL OF THE INTERNAL PERIPHERAL INTERRUPT REQUEST LATCHES SHOULD
;BE CLEARED FOR SAFE MEASURE
MOV DX, SCUIRL
MOV AX, 0F00H
OUT DX, AX
MOV DX, TIMIRL
OUT DX, AX
MOV DX, DMAIRL
OUT DX, AX
;INITIALIZE SLAVE 82C59 MODULE
MOV DX, SPICP0 ;ICW1 ->SPICP0
XOR AH, AH ;CLEAR RESERVED BITS
MOV AL, 11H ;EDGE TRIG, CASCADE, IC4 REQRD
OUT DX, AL
;SET BASE INTERRUPT TYPE AT 104 FOR SLAVE
MOV DX, SPICP1 ;ICW2 ->SPICP1
MOV AL, SLAVE_BASE_TYPE ;BASE ADDRESS AT 01A0H
OUT DX, AL
;SLAVE ID
MOV DX, SPICP1 ;ICW3 ->SPICP1
MOV AL, 7 ;ID=7 ALLWAYS FOR INTERNAL SLAVE
OUT DX, AL
MOV DX, SPICP1 ;ICW4 ->SPICP1
MOV AL, 1 ;NO SFNM, NO AEOI, FACTORY TEST CODES SET
OUT DX, AL
MOV DX, SPICP1 ;OCW1 ->SPICP1
MOV AL, 07FH ;UNMASK INT7 (IR7 OF SLAVE)
OUT DX, AL
;INITIALIZE MASTER MODULE
MOV DX, MPICP0 ;ICW1 ->MPICP0
XOR AH, AH
MOV AL, 11H ;EDGE TRIG, CASCADE, IC4 REQRD
OUT DX, AL
MOV DX, MPICP1 ;ICW2 ->MPICP1
MOV AL, MASTER_BASE_TYPE ;BASE TYPE FOR MASTER
OUT DX, AL ;BASE ADDRESS AT 0180H
;SET BASE INTERRUPT TYPE FOR THE MASTER AT TYPE 96
;WHICH IS EQUAVALENT TO A BASE ADDRESS OF 180H. BETWEEN
;THE BASE TYPES OF THE MASTER AND THE SLAVE, THERE IS A
;CONTIGUOUS BLOCK FROM 180H TO 1BCH FOR THE INTERRUPT VECTORS
;ADDRESS IR LINE TYPE FUNCTION 82C59
;------------------------------------------------------------
;1BC 7 111 INT7 SLAVE
;1B8 6 110 TXI0 SLAVE
;1B4 5 109 RXI0 SLAVE
;1B0 4 108 TMI2 SLAVE
;1AC 3 107 DMAI3 SLAVE
;1A8 2 106 DMAI2 SLAVE
;1A4 1 105 TMI1 SLAVE
;1A0 0 104 TMI0 SLAVE
;19C 7 103 SLAVE MASTER
;198 6 102 INT6 MASTER
;194 5 101 INT5 MASTER
;190 4 100 INT4 MASTER
;18C 3 99 INT3 MASTER
;188 2 98 INT2 MASTER
;184 1 97 INT1 MASTER
;180 0 96 INT0 MASTER
MOV DX, MPICP1 ;ICW3 ->MPICP1
MOV AL, 80H ;SLAVE MODULE IS ALWAYS ON IR7
OUT DX, AL
MOV DX, MPICP1 ;ICW4 ->MPICP1
MOV AL, 1 ;NO SFNM, NO AEOI, FACTORY TEST CODES
OUT DX, AL
MOV DX, MPICP1 ;OCW1 ->MPICP1
MOV AL, 0H ;UNMASK ALL MASTER IR LINES
OUT DX, AL
RET
INIT_ICU ENDP
EC_CODE ENDS
END MAIN
A.2 ISR for Unexpected or Uninitialized Interrupts
When programming the interrupt control unit, it is important to take unexpected events into consideration. It is possible for
an interrupt to occur that was unintentional or unwanted and therefore software should exist to prevent system failure.
The following two subroutines can be used to direct unused interrupts to a common interrupt service routine where they
can be handled appropriately to return control back to the main program. These subroutines were not added in Example #1
because the evaluation board firmware already compensates for unwanted interrupts.
Example A-2. ISR for Unexpected or Uninitialized Interrupts (Sheet 1 of 2)
;****************************************************************************
;PROCEDURE: FILL_UNWANTED_INTS
;
;WHENEVER AN UNEXPECTED/UNINITIALIZED INTERRUPT OCCURS, THE PROCESSOR WILL
;VECTOR TO THE UNWANTED_INT INTERRUPT SERVICE ROUTINE TO PREVENT SYSTEM
;HANG-UPS
;****************************************************************************
FILL_UNWANTED_INTS PROC
;FILL ENTIRE INTERRUPT VECTOR TABLE WITH UNWANTED_INT VECTORS
XOR AX, AX ;CLEAR ACCUMULATOR
MOV DS, AX ;CLEAR DATA SEGMENT
MOV DI, 0 ;START AT 0
MOV CX, 256 ;DO 256 TIMES
FILL_OFFSETS:
MOV WORD PTR DS:[DI], OFFSET UNWANTED_ISR
ADD DI, 4 ;FILL OFFSETS
LOOP FILL_OFFSETS
MOV DI, 2 ;START AT 2
MOV CX, 256 ;DO 256 TIMES
FILL_SEGMENTS:
MOV WORD PTR DS:[DI], SEG UNWANTED_ISR
ADD DI, 4 ;FILL SEGMENTS
LOOP FILL_SEGMENTS
FILL_UNWANTED_INTS ENDP
;****************************************************************************
;INTERRUPT SERVICE ROUTINE: UNWANTED_ISR
;
;WHENEVER AN UNEXPECTED/UNINITIALIZED INTERRUPT OCCURS, THE PROCESSOR WILL
;VECTOR TO THIS INTERRUPT SERVICE ROUTINE AND DISPLAY PATTERN1 ON 7SEG1
;AND PATTERN2 ON 7SEG2 THEN RETURN TO NORMAL PROGRAM EXECUTION
;****************************************************************************
UNWANTED_ISR PROC
MOV DX, _7SEG1
MOV AL, PATTERN1
OUT DX, AL
MOV DX, _7SEG2
MOV AL, PATTERN2
OUT DX, AL
IRET ;RETURN TO NORMAL PROGRAM EXECUTION
UNWANTED_ISR ENDP