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Updated: November 30, 2006
System Memory Features The boards have four DIMM sockets and support the following memory features:
- 1.8 V and 1.9 V DDR2 SDRAM DIMMs
- Unbuffered, single-sided or double-sided DIMMs with the following restriction: Double-sided DIMMs with x16 organization are not supported.
- 8 GB maximum total system memory
- Minimum total system memory: 128 MB
- ECC DIMMs and non-ECC DIMMs
- Serial Presence Detect
- DDR2 667 and 533 MHz SDRAM DIMMs
Notes
- Remove the PCI Express* x16 video card before installing or upgrading memory to avoid interference with the memory retention mechanism.
- To be fully compliant with all applicable DDR SDRAM memory specifications, the board should be populated with DIMMs that support the Serial Presence Detect (SPD) data structure. This allows the BIOS to read the SPD data and program the chipset to accurately configure memory settings for optimum performance. If non-SPD memory is installed, the BIOS will attempt to correctly configure the memory settings, but performance and reliability may be impacted or the DIMMs may not function under the determined frequency.
Supported DIMM Configurations The following table lists the supported DIMM configurations.
| DIMM Capacity |
Configuration (Note 1) |
SDRAM Density |
SDRAM Organization Front-side/Back-side |
Number of SDRAM Devices (Note 2) |
| 128 MB |
SS |
256 Mbit |
16 M x 16/empty |
4 [5] |
| 256 MB |
SS |
256 Mbit |
32 M x 8/empty |
8 [9] |
| 256 MB |
SS |
512 Mbit |
32 M x 16/empty |
4 [5] |
| 512 MB |
DS |
256 Mbit |
32 M x 8/32 M x 8 |
16 [18] |
| 512 MB |
SS |
512 Mbit |
64 M x 8/empty |
8 [9] |
| 512 MB |
SS |
1 Gbit |
64 M x 16/empty |
4 [5] |
| 1024 MB |
DS |
512 Mbit |
64 M x 8/64 M x 8 |
16 [18] |
| 1024 MB |
SS |
1 Gbit |
128 M x 8/empty |
8 [9] |
| 2048 MB |
DS |
1 Gbit |
128 M x 8/128 M x 8 |
16 [18] | |
| Notes:
- In the second column, "DS" refers to double-sided memory modules (containing two rows of SDRAM) and "SS" refers to single-sided memory modules (containing one row of SDRAM).
- In the fifth column, the number in brackets specifies the number of SDRAM devices on an ECC DIMM.
In the second column, "DS" refers to double-sided memory modules (containing two rows of SDRAM) and "SS" refers to single-sided memory modules (containing one row of SDRAM). In the fifth column, the number in brackets specifies the number of SDRAM devices on an ECC DIMM.
Tested Memory 3rd Party Tested Memory
† 3rd party tested memory occurs as requested by the memory vendors and is tested at an independent memory house that is not a part of Intel - Computer Memory Test Labs (CMTL). Note: This link will take you away from Intel's web site. Vendor Self Tested Memory Intel supplies the memory vendors that participate in this program with a common memory test plan to use as a basic checkout of the memory stability. Memory listed here was either tested by the memory vendor or by Intel using this test plan. These part numbers may not be readily available throughout the product life cycle.
The table below lists parts which passed testing conducted using Intel's Self Test program for Intel® Desktop Board D975XBX. For a complete explanation of the self test see the Desktop Board Component Functional Testing Levels page.
Module Supplier Module Part Number |
Module Size (MB) |
Module Speed (MHz) |
Latency CL-tRCD-tRP |
ECC or Non-ECC? |
DIMM Organi-zation |
Module Date Code |
Component Used Comp Part Number |
Micron* MT16HTF12864AY-667B3 |
1024 MB |
667 |
5-5-5 |
Non-ECC |
DSx8 |
0602 |
Micron MT47H64M8CB |
Micron MT16HTF12864AY-667D4 |
1024 MB |
667 |
5-5-5 |
Non-ECC |
DSx8 |
0602 |
Micron MT47H64M8B6 |
Micron MT8HTF6464AY-667D7 |
512 MB |
667 |
5-5-5 |
Non-ECC |
SSx8 |
0601 |
Micron MT47H64M8B6 |
Micron MT16HTF12864AY-53ED4 |
1024 MB |
533 |
4-4-4 |
Non-ECC |
DSx8 |
0611 |
Micron MT47H64M8B6 |
Micron MT8HTF6464AY-53EB8 |
512 MB |
533 |
4-4-4 |
Non-ECC |
SSx8 |
0550 |
Micron MT47H64M8CB |
Micron MT16HTF6464AY-53EB2 |
512 MB |
533 |
4-4-4 |
Non-ECC |
DSx8 |
0506 |
Micron MT47H32M8BP | |

† This link will take you off of the Intel Web site. Intel does not control the content of the destination Web Site. |
This applies to:
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