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Symptom:
On some machines the performance of writes to the target device is severely degraded depending on which PCI bus the Intel® PRO/1000 T IP Storage Adapter is using.
Workaround:
Intel has seen the performance of writes to be dependent on the chipset used in the machine. For example, on a Dell PowerEdge* 6300 server with the 450 NX chipset, there are two PCI to Host chips. Attached to one PCI to Host chip set are four 32-bit PCI slots, and to the other Host chip set are four 64-bit PCI slots. As can be seen in figure 1-1, most of the I/O devices are connected to the PCI to Host chip PXB #0 that has the four 32-bit PCI slots. Using the PRO/1000 T IP Storage adapter on any of the four 32 bit PCI slots, would cause contention with the other I/O devices for control of the bus. This contention will result in the performance of writes to fall. Placing the adapter in one of the 64-bit PCI slots on Host bus PXB #1 (figure1-1) will give the desired performance. The workaround for this problem is to look at the chipset architecture of the specific machine and try to use a dedicated PCI bus.
Another factor that could impact performance is the latency of reading host memory. In many cases a host memory read instruction goes through a PCI to Host chip and the Host to Memory chip before accessing the memory. Some machines have a dedicated PCI slot to directly communicate with the Host to Memory chip on the machine. This reduces latency of reading host memory. An example of the 860 chipset is shown below. There are two 64/66 PCI buses connected directly to the MCH.
This applies to:
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